This invention relates to a process for electrolytically plating copper onto surfaces, particularly for electroplating in very confined areas such as through-holes or vias on printed circuit boards. The process of the invention is particularly suited to plating very small printed circuit vias.
Electrolytic copper plating is a process which deposits copper on conductive substrates using an external electric current. Widely known commercial electrolytic copper plating solutions include aqueous solutions of copper sulfate, copper fluorborate or copper cyanide along with various additives that improve the properties of the copper deposit. The most widely used commercial copper plating electrolyte is based on an aqueous solution of copper sulfate, sulfuric acid and various plating additives. Regarding copper electrolytic plating baths and additives in general, please refer to U.S. Pat. Nos. 5,068,013; 5,174,886; and 5,051,154; the teachings each of which are incorporated herein by reference in their entirety.
The use of alkane sulfonic acids in electrolytic copper plating is also known. U.S. Pat. No. 6,605,204, the teachings of which are incorporated by reference herein in their entirety, discusses the electrolytic deposition of copper onto electronic devices using a solution comprising copper alkane sulfonate salts and free alkane sulfonic acids.
Miniaturization and increased functionality demands have substantially decreased the sizes of electronic features that need to be plated. For instance, many circuit board designs require the effective plating of blind vias with diameters in the range of about 25 to about 250 microns, with an aspect ratio in the range of about 1:1 up to about 1.5:1, and simultaneously plating though holes with an aspect ratio of up to about 8:1. Many electrolytic copper plating baths are not capable of plating in such confined spaces. In some cases wettability is a problem, in other cases mass transport presents issues and in other areas electrical effects cause difficulties. Historically, the reliability of simultaneously plated though holes, incorporated with mixed technology designs, has not been able to meet industry specifications.
As a result, a need remains for an electrolytic copper plating solution and process which is capable of effectively plating in confined spaces. The electrolytic copper plating solution and process proposed herein are particularly designed and suited for electronic applications where effective plating is required in confined spaces.